
- Backing from AI giants: NVIDIA and Google together subscribed to USD 3.9 billion of convertible bonds, a vote of confidence in MediaTek’s AI chip development capabilities.
- Technology edge: With the 2nm and 3nm leading-edge design experience built up in its mobile business and its long-standing relationship with TSMC, MediaTek holds advantages in both chip design and securing leading-edge capacity, exactly what Google needs to cut costs and broaden supply.
- Google TPU partnership: MediaTek has broken Broadcom’s long-standing exclusivity, winning Google’s eighth-generation (3nm/CoWoS) and ninth-generation (2nm/EMIB-T) TPU programmes.
- Packaging shift: MediaTek has secured the ninth-generation TPU programme, expected to enter production in early 2028 using 2nm compute dies and Intel EMIB-T packaging. Two programmes in hand lay the foundation for scaling its ASIC business.
In early September, NVIDIA and Google announced they would subscribe to a combined USD 3.9 billion of MediaTek convertible bonds, sending MediaTek shares up 10% on the day. Why would MediaTek, a company whose core business is smartphone chips, win the backing of two AI giants at once?
We have argued before that Taiwan’s edge lies in its ecosystem, and MediaTek is the standard-bearer of its home-grown chip-design capability. How did years of accumulated technology become the key to NVIDIA’s AI expansion and Google’s in-house chip push? This article breaks it down.
MediaTek’s AI turning point: from smartphone leader to AI, why has it won the favour of NVIDIA and Google?
MediaTek started out making chips for CD and DVD players, then expanded into handsets with integrated chip-and-software solutions, and has been the world’s largest smartphone processor supplier by volume since 2020. Over more than 20 years, the mobile business gave the company expertise in advanced process nodes, power efficiency and system integration, while its huge shipment volumes gave it clout across the supply chain. Another key technology came from a switch-chip business that never made it to market but left behind SerDes, the high-speed data-transfer technology that Google would later prize. Combined with the strengths built up in mobile, that technology finally opened the door to custom AI accelerators (ASICs)* for MediaTek.
*Custom AI accelerator (ASIC): a chip designed for a single customer or a specific workload, as opposed to NVIDIA’s general-purpose GPUs, which are sold to many customers.
Table 1: A decade of MediaTek’s technology building blocks: from smartphone chips to an edge in AI ASICs
|
Capability |
Origin |
Track record |
Why it matters for the ASIC business |
|
Advanced-node experience |
Mobile |
World’s first 4nm smartphone chip and the first 3nm Android chip; among the first to complete a 2nm tape-out in September 2025 |
More and more AI chips will rely on leading-edge nodes, so MediaTek’s advanced-node tape-out experience is critical |
|
Power efficiency |
Mobile |
Power consumption is the core battleground in smartphone chips |
Data-centre chips are equally constrained by power limits |
|
System integration |
Mobile |
Puts the CPU, GPU, AI engine and modem on a single chip |
Can take on the entire design beyond the customer’s compute core |
|
Procurement |
Mobile |
Ships chips for more than 2 billion devices a year |
Leverage to secure capacity at TSMC and memory makers |
|
High-speed SerDes |
Switch-chip team that grew out of the optical-drive unit |
Began developing switch chips in 2015; the switch never took off, but SerDes advanced from 10G to 224G over a decade |
Without this technology, the other four would be of no use; the only supplier other than Broadcom |
|
Source: MediaTek, TrendForce, iFAST compilations |
|||
MediaTek is steadily expanding beyond smartphones. Surging AI hardware demand has pushed up memory costs and weighed on smartphone demand, particularly in the low- to mid-range. In 2Q26, MediaTek’s mobile revenue fell 20% year on year, and mobile’s share of group revenue dropped from 59% in 4Q25 to 41%.
Over the same period, Smart Edge Platforms revenue rose 26% year on year to 53% of group revenue, making it the largest revenue source. Note that data-centre ASICs only enter volume production in the fourth quarter, so their revenue contribution in 2Q was still close to zero. Management expects full-year 2026 data-centre revenue to exceed USD 2 billion, still smaller than a single quarter of current Smart Edge Platforms revenue; as the data-centre business grows sharply in 2027, Smart Edge Platforms should further cement its position as the group’s largest revenue source.
Table 2: MediaTek business mix
|
Business |
2Q26 revenue share |
Products |
|
Mobile Phone |
41% |
Dimensity smartphone processors. 2nm flagship launches in 3Q26. |
|
Smart Edge Platforms |
53% |
Connectivity, TV, tablet, Chromebook, automotive, computing and AI chips. First AI ASIC scheduled for production in 4Q26. |
|
Power IC |
6% |
2Q26 revenue rose 6% YoY, with share gains in the computing and data-centre markets. |
|
Source: MediaTek, iFAST compilations; Data as of 31 July 2026 |
||
Table 3: MediaTek key financials
|
NT$ billion |
2024 |
2025 |
1H26 |
|
Revenue |
530.6 |
596.0 |
301.3 |
|
Revenue growth YoY |
22.4% |
12.3% |
-0.8% |
|
Gross margin |
49.6% |
47.5% |
46.2% |
|
Operating margin |
19.3% |
17.4% |
15.2% |
|
Net profit |
107.2 |
106.1 |
49.0 |
|
Source: MediaTek, iFAST compilations Data as of 31 July 2026 |
|||
Breaking Broadcom’s decade of exclusivity: why Google brought in MediaTek
Broadcom has worked with Google since the first-generation TPU. Google designs the compute core, while Broadcom, drawing on its industry-leading high-speed interconnect (SerDes) technology, handles three key tasks:
- Designing the interface circuits and I/O die that let the compute core exchange data at high speed with external components;
- Laying out the chip’s internal circuitry and wiring, and handing the design to TSMC for prototype manufacturing (tape-out);
- Designing the packaging that integrates and connects the compute die and high-bandwidth memory (HBM) in a single package.
The long exclusive relationship gave Broadcom pricing power; even procuring HBM on Google’s behalf earned it a markup as an additional revenue stream.
MediaTek had long had Broadcom’s market in its sights. Well before the AI boom, the company tried to enter the switch business and invested heavily in SerDes development, groundwork that now underpins its Google TPU business. Add the 2nm design experience from mobile and its long-standing relationship with TSMC, and MediaTek holds advantages in both chip design and securing leading-edge capacity, exactly what Google needs to cut costs and broaden supply.
The partnership also departs from the original Broadcom–Google model: Google keeps the compute architecture design and buys HBM directly from SK hynix, while MediaTek supplies the interface technology and I/O die, handles packaging design and helps turn the chip design into a manufacturable layout. By adding a second supplier and sourcing HBM itself, Google saves the markup it paid Broadcom for procuring HBM.
Table 4: Broadcom vs. MediaTek: division of labour under the two supply models
|
Function |
Broadcom model |
MediaTek model |
|
Compute architecture and front-end design |
|
|
|
Compute die back-end support |
Google-led, supported by Broadcom |
Google-led, supported by MediaTek |
|
SerDes |
Broadcom in-house IP |
MediaTek in-house IP |
|
I/O die |
Designed by Broadcom |
Designed by MediaTek |
|
Packaging design |
Broadcom; CoWoS-L and 3.5D platforms |
MediaTek; CoWoS first, switching to Intel EMIB-T for the 2028 programme |
|
Tape-out at TSMC |
Broadcom manages implementation |
MediaTek provides design libraries and implementation support |
|
HBM procurement |
Broadcom buys and resells; Counterpoint estimates the resale price is 15–20% above cost |
Google buys directly from SK hynix |
|
Source: Counterpoint, HSBC, Broadcom and MediaTek earnings calls, iFAST compilations |
||
NVIDIA also values MediaTek’s technology, and the two already have a track record together. In 2025 they jointly built the GB10 superchip, with MediaTek designing the CPU, memory subsystem and high-speed interfaces and NVIDIA contributing GPU technology. NVIDIA’s USD 3.5 billion investment in MediaTek this year may signal that the partnership will extend from PCs into the data centre, and it echoes NVIDIA’s strategy of expanding its ecosystem.
Faced with in-house chips such as Google’s TPU and Amazon’s Trainium, NVIDIA chose to embrace them: through NVLink Fusion, it lets these chips plug into its racks, bringing the cloud providers’ custom-silicon demand into its own ecosystem. The roughly USD 2 billion investment in Marvell in March and now the investment in MediaTek can both be read as moves to reinforce this ecosystem; and Trainium4, the next generation we discussed in “How AWS Uses Custom Chips to Build a Money-Printing Machine”, will also support NVLink Fusion. MediaTek’s experience developing TPUs for Google should help more cloud providers connect their in-house chips to NVIDIA’s systems, opening the door to more customers.
MediaTek in Google’s TPU roadmap: comparing the division of labour
From the eighth generation, Google splits the TPU into separate training and inference chips, sourced from different partners:
- Broadcom supplies the inference chip: Broadcom signed a long-term agreement with Google in April to supply Google's custom TPUs and AI-rack networking components through 2031.
- MediaTek supplies the training chip: Management says its first AI accelerator ASIC enters production in 4Q26, with 2026 data-centre revenue exceeding USD 2 billion.
MediaTek has also secured the ninth-generation TPU programme, expected to enter production in early 2028 using 2nm compute dies and Intel EMIB-T packaging. Two programmes in hand lay the foundation for MediaTek to scale its ASIC business; however, Google has yet to decide how shipments will be split between the two suppliers, so the size of the 2028 revenue increase still depends on the orders and shipment volumes MediaTek actually wins.
Table 5: MediaTek TPU programme timeline and advanced packaging compared
|
Google TPU generation |
Production timing and technology |
Use and status |
|
Eighth |
4Q26; TSMC 3nm and CoWoS |
Mainly for training workloads. Management expects 2026 ASIC revenue to exceed USD 2 billion. |
|
Ninth |
Early 2028; TSMC 2nm compute dies and Intel EMIB-T |
Programme secured, running alongside a Broadcom part; shipment allocation undecided. |
|
Subsequent generations |
At quotation stage; not yet awarded |
MediaTek’s second-source position is being tendered; scope and commercial terms undecided. |
|
Source: MediaTek earnings calls, SemiAnalysis, media reports, iFAST compilations |
||
Intel’s EMIB-T: challenge or opportunity?
In “TSMC 2Q26 results tell you why we are so bullish on Asian semiconductors”, we noted that Intel’s EMIB-T packaging platform is set to become a serious challenger to TSMC’s CoWoS. CoWoS capacity through end-2027 is reportedly fully booked by NVIDIA and other customers, so if Google wants to scale TPU shipments in early 2028 it needs an alternative. Beyond capacity, EMIB-T also has a cost advantage: by replacing the full silicon interposer with embedded silicon bridges, it offers a lower-cost option for larger packages.
EMIB-T is, however, less mature than CoWoS. Substrate yields for MediaTek’s second programme are reportedly 45–60%, below the 80–85% of NVIDIA’s Rubin programme. Whether 2028 capacity will meet expectations remains an open question.
Figure 1: How the three packaging platforms differ

Google redraws the division of labour, NVIDIA opens new doors
MediaTek has secured Google’s eighth- and ninth-generation TPU programmes, but the partnership beyond them is not settled. Google has reportedly issued a request for quotation (RFQ) for the second-source position MediaTek currently holds.
In later generations, Google could assign the compute die’s back-end design to a design-service provider such as GUC or Alchip, leaving MediaTek with SerDes, the I/O die, packaging design and programme management. That would narrow MediaTek’s scope of supply, but if the technical content and value of what it retains rise, revenue per chip need not fall from the previous programme.
NVIDIA’s USD 3.5 billion investment, however, could open another path for MediaTek to expand. The company’s data-centre ASIC business still depends mainly on Google, but through NVIDIA’s rack ecosystem MediaTek could reach more cloud customers and win orders beyond Google.
Investment implications: after a sharp rally, is the AI transformation still undervalued?
MediaTek shares have risen about 240% year to date, far outpacing the TAIEX. The stock now trades at 66 times 2026 expected earnings. In our view, the share price already reflects a good part of the growth expected from the two upcoming TPU programmes; what matters next is whether the related revenue and earnings are delivered on schedule, and whether subsequent programmes can sustain the growth.
NVIDIA’s investment gives MediaTek a new opportunity to broaden its customer base, but the NVLink Fusion partnership has yet to yield an announced order, and talks with a second ASIC customer have gone on for about a year without a confirmed win. For now, the ASIC outlook still depends mainly on Google. The mobile business is not out of the woods either: management expects global smartphone shipments to fall about 15% in 2026, and continued handset weakness could offset part of the initial ASIC contribution.
Although MediaTek’s valuation is elevated, our positive view on the Taiwan market and Asian semiconductors is unchanged. By working its way into the AI chip supply chain through Google’s TPU programmes, MediaTek adds a chip-design growth engine to the region’s semiconductor industry, complementing TSMC’s foundry business and the memory businesses of Samsung Electronics and SK hynix.
Investors cannot yet buy MediaTek shares directly on our platform, but they can gain exposure through funds and ETFs. For example, the Global X Asia Semiconductor ETF (HKEX: 3119) allocates 6.7% of its assets to MediaTek, its fifth-largest holding, and also covers supply-chain segments such as foundry and memory, allowing investors to capture the opportunities across Taiwan’s semiconductor industry. For a more concentrated position in Taiwan, investors could also consider the Franklin FTSE Taiwan ETF (NYSE: FLTW), to participate in the long-term growth of Taiwan’s semiconductor ecosystem and related companies.
Related investment products:
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Market / Sector |
ETF |
|
Taiwan |
|
|
Asian
semiconductors | Global X Asia Semiconductor ETF (HKEX: 3119) |
Declaration:
This research report was prepared with the assistance of artificial intelligence (AI) tools. iFAST Financial Pte Ltd does not rely exclusively on AI for content generation; the content of this report – including all investment theses, ratings, price targets and conclusions – has been independently reviewed and verified by the research analyst(s) to ensure accuracy and professional integrity.
For specific disclosure, at the time of publication of this report, IFPL (via its connected and associated entities) and the analyst who produced this report hold a NIL position in the abovementioned securities.

